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Microchip Technology /ATSAMV70J20 /PMC /CKGR_PLLAR

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Interpret as CKGR_PLLAR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (_0)DIVA0PLLACOUNT0MULA0 (ONE)ONE

DIVA=_0

Description

PLLA Register

Fields

DIVA

PLLA Front End Divider

0 (_0): Divider output is 0 and PLLA is disabled.

1 (BYPASS): Divider is bypassed (divide by 1) and PLLA is enabled.
PLLACOUNT

PLLA Counter
MULA

PLLA Multiplier
ONE

Must Be Set to 1

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data